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Weixin Official Accounts Platform Analog Core Vision | How to Improve Active RF Converter Front-End Anti-aliasing Filter Design Technology Original Texas Instruments Texas Instruments Texas Instruments Texas Instruments Semiconductor Technologies (Shanghai) Co., Ltd Texas Instruments is a global semiconductor company dedicated to designing, manufacturing, testing, and selling analog and embedded processing chips used in markets such as industrial, automotive, personal electronics, communication equipment, and enterprise systems. We will share with you the latest updates and technological innovations of TI here. 893 original contents August 17, 2024, 12:03 Guangdong Welcome back to our technical column – Analog Core Vision. In the previous issue, we introduced the structure and working principle of the 4-20mA transmitter and design alternatives using general semiconductor products. This time, we bring you ‘How Anti-aliasing Filter Design Technology Improves Active RF Converter Front-End.’ Optimizing Anti-aliasing Filter (AAF) design can produce better Signal-to-Noise Ratio (SNR) performance and lower Spurious-Free Dynamic Range (SFDR) in the required frequency band. Introduction Using an active analog-to-digital converter (ADC) front end with a fully differential amplifier (FDA) has many advantages, such as better impedance matching, passband flatness, and signal gain. However, if your next design only requires part of the ADC’s frequency band, it is necessary to use an anti-aliasing filter (AAF) between the FDA’s output and the ADC’s input. AAF will produce better SNR performance and lower SFDR in the required frequency band. For any AAF filter structure, you need to balance several factors during use: filter order and topology, or whether reverse termination or series resistors are needed to enhance the interface between FDA and ADC. In this article, we will discuss the nuances of these AAF and how to avoid potential issues in your next design. AAF Design Method Assuming you have determined the correct FDA for your application, decide whether to use a low-pass or band-pass filter to achieve excellent performance (bandwidth, SNR, and SFDR) in front of the ADC, please follow these three steps: 1. Understand the characteristic load impedance (RL) of the amplifier. To make the amplifier perform excellently, implement the correct DC load or RL listed in the data sheet for the amplifier. This is the characteristic impedance, usually found at the top of the specification sheet. 2. Determine the starting value of the correct output series resistor closest to the amplifier output. This helps prevent unnecessary peaks in the passband. This information can also be found in the FDA’s data sheet – LMH5401 8GHz, low noise, low power, fully differential amplifier data sheet. 3. Decide whether to use one or more external parallel resistors to reverse terminate the ADC’s input and the starting value of the input series resistor to isolate the ADC from the filter. These series resistors also help reduce unnecessary peaks and ‘kickbacks’ in the passband common in unbuffered ADCs. Figure 1 shows a specification example. Figure 1. Electrical specification excerpt from the LMH5401 data sheet, where RL = 200Ω The general circuit shown in Figure 2 and the filter parameter list in Table 1 are applicable to most high-speed differential FDA and ADC interfaces; you can use both as the basis for AAF design. Although not every filter structure is exactly the same, Figure 2 can serve as a blueprint for quick-start design. Using this design method helps to maximize the benefits of the relatively high input impedance of most high-speed ADCs and the relatively low output impedance of the driving source (FDA), minimizing filter insertion loss. Figure 2. General FDA and ADC interface with band-pass filter Table 1. Filter parameter definitions AAF Design Process and Parameters Basic AAF design flow and guidelines include: 1. Properly set the external ADC termination resistor (RTADC). This helps the AAF achieve ‘practical’ impedance within its desired frequency response range. 2. Select RKB based on experience or ADC data sheet recommendations; typically, this value is between 5Ω and 50Ω. 3. Using Equation 1, calculate the filter load impedance so that the parallel and series resistance sum of RTADC, RKB, and RADC is between 100Ω and 400Ω. Refer to the suggestions in the previous section. ZAAFL = RTADC || (RADC + 2RKB) (1) 4. Select the amplifier external series resistor (RA). This value is usually between 5Ω and 50Ω. RA helps to suppress the amplifier output response and reduce unnecessary peaks in the passband. 5. Using the calculated ZAAFL, ensure the total load (ZAL) of the amplifier is suitable for the chosen specific differential amplifier. Refer to step 1 in the ‘AAF Design Method’ section above and use Equation 2: ZAL = 2RA + ZAAFL (2) Note that ZAL is the characteristic RL of the FDA; therefore, using too high or too low values will adversely affect the amplifier’s linearity. 6. Use Equation 3 to calculate the filter source resistance: ZAAFS = ZO + 2RA (3) 7. Design the filter using a filter design program, if possible, using the same source impedance ZAAFS and load impedance ZAAFL. This helps reduce the loss in the filter. Any mismatch between the input/output impedance will result in a loss of 10*log(input Z / output Z). For example, if the input impedance is 50Ω and the output impedance is 200Ω, the filter loss will be -6.0dB or 10*log(50/200). In addition, using a bandwidth about 10% more or higher than the required bandwidth can meet the bandwidth needs of each application and help overcome the second- and third-order parasitic losses not achieved during filter implementation. After several preliminary simulations, quickly check the following items in the circuit: 8. The values of CAAF2 & 3 relative to CADC should be large enough to minimize the filter’s sensitivity to changes in CADC. 9. The ratio of ZAAFL to ZAAFS should not exceed 6:7, so the filter can meet the requirements of most filter tables and design programs. Ideally, they should be the same to minimize loss, but this is usually not possible. 10. Use a few pF of CAAF2 value as much as possible to minimize sensitivity to parasitic capacitance and component variations. 11. Inductors LAAF1 and LThe mismatch will cause a loss of 10*log(input Z / output Z). For example, when the input impedance is 50Ω and the output impedance is 200Ω, the filter’s loss is -6.0dB or 10*log(50/200). In addition, using a bandwidth that is about 10% more or higher than the required application bandwidth will meet the bandwidth demands of each application and help overcome second and third-order parasitic losses not realized during filter implementation. After several initial simulations, quickly check the following items in the circuit: 8. The value of CAAF2 & 3 should be sufficiently large relative to CADC to minimize the filter’s sensitivity to changes in CADC. 9. The ratio of ZAAFL to ZAAFS should not exceed 6:7 for the filter to meet most filter tables and design programs requirements. Ideally, they should be the same to minimize loss as much as possible, but this is often not possible. 10. Use a few picofarads of CAAF2 values to minimize sensitivity to parasitic capacitance and component changes. 11. Inductors LAAF1 and LAAF2 should have reasonable values and be within the nanohenry range. 12. The values of CAFF2 and LAAF2 should be reasonable; choose these two parameters to optimize the filter’s center frequency. Sometimes the circuit simulator may set these values too low or too high. To make these values more reasonable, simply proportion these values to better standard value components that maintain the same resonance frequency. 13. When designing in the gigahertz range, use the 0201 package style to minimize second and third-order parasitic effects that can disrupt the filter’s characteristic shape or profile. In certain cases, the filter design program may provide multiple unique solutions, especially for higher-order filters. Be sure to choose the solution that uses the most reasonable component values set. For filter configurations using end-of-line parallel capacitors, also consider the ADC’s internal input capacitance. You may need one or two iterations to correctly set the filter poles and final bandwidth. AAF Design Trade-offs The parameters in this interface circuit are highly interactive; therefore, it is almost impossible to optimize the circuit for primary specifications (bandwidth, bandwidth flatness, SNR, SFDR, and gain) without trade-offs. However, you can reduce the bandwidth peak more significantly by changing RA and/or RKB, which usually occurs at the end of the bandwidth response; either method will have a net positive or negative impact on AAF bandwidth performance. Note how the passband peak is enhanced or flattened in Figure 3 as the FDA output series resistance (RA) value changes (blue dotted curve). As this resistance value decreases, the signal peak increases, and the amplifier can drive fewer signals to fill the ADC’s full-scale input range, but at the cost of passband flatness response near the AAF frequency response edge. Figure 3. Relationship between passband flatness performance and RA and RKB changes The RA value also affects SNR performance. Smaller values, although enhancing the bandwidth peak, often reduce the signal-to-noise ratio due to increased bandwidth and unwanted noise. Additionally, series resistance RKB must be selected at the ADC input to minimize distortion caused by any residual charge injected by the ADC’s internal sampling capacitors. However, increasing this resistance will also increase or decrease the bandwidth peak, depending on the filter topology. To optimize AAF’s roll-off frequency, adjust the ideal frequency coverage range by slightly changing CAAF2. Typically, you can determine the ADC input termination resistance RTADC value to make the ADC’s net input impedance close to the typical value of most amplifier characteristic loads (RL). Choosing RTADC values that are too high or too low can adversely affect the amplifier’s linearity, which will then reflect in the overall SFDR signal chain lineup. AAF Design Example The design example circuit shown in Figure 4 is a broadband low-pass receiver front-end based on the Texas Instruments (TI) TRF1208 10MHz to 11GHz, 3dB bandwidth, single-ended to differential amplifier, and TI ADC12DJ5200RF RF sampling 12-bit dual-channel 5.2GSPS ADC. We optimized a third-order Butterworth AAF based on the performance and interface requirements of the amplifier and ADC; the total insertion loss caused by the filter network and other components is less than 6dB. In this AC-coupled design, the 0.1µF capacitor blocks the common-mode voltage between the amplifier, its termination resistors, and the ADC input. Figure 4. FDA, AAF, ADC broadband receiver front-end design (simplified schematic) The 10MHz to 11GHz TRF1208 differential amplifier accepts single-ended input and converts it to a differential signal running at 16dB gain to compensate for the filter network’s insertion loss, providing a total signal gain of +7.8dB. An input signal of -6.8dBm produces a full-scale 800mV peak-to-peak differential signal at the ADC input. The entire circuit has a bandwidth of 2.34GHz, with a passband flatness of less than 3dB. The SNR and SFDR measured using a 534MHz analog input frequency are 52.5dBFS and 71.4dBFS, respectively. The sampling frequency is 5.2GSPS, creating a broadband low-pass filter that spans the entire first Nyquist zone from 10MHz to 2.5GHz. Figure 4 shows the values of the final passive filter components selected after adjusting for actual circuit parasitics. Using standard filter design programs, the AAF is designed as a third-order Butterworth filter with a differential source impedance (ZAAFS) of 39Ω (2 × 18Ω + 3Ω), a differential load impedance of 103Ω (ZAAFL), and a cutoff frequency of 2.4GHz. Due to the need for higher series inductance values in the simulation, considering the inherent wiring inductance in the layout, I reduced these inductors to 3nH and proportionally increased the initially simulated 1.8pF ground capacitance to 2.2pF to maintain proper roll-off near the required 2.4GHz. In this case, to achieve net performance, the TRF1208 is not reverse terminated, resulting in a net differential impedance load of 139Ω (ZAL). An 18Ω series resistor isolates the filter capacitor from the amplifier output. A 15Ω resistor is installed in series with the ADC input to isolate the filter and the amplifier’s internal switching transients and provide the necessary characteristic load for the FDA. According to the datasheet, we used a 100Ω input impedance for the ADC. Table 2 summarizes the system’s measured performance, with the total insertion loss of the network being about 5.8dB. Table 2. Measured performance of the circuit Figure 5 showsDevice, the differential source impedance (Z AAFS ) is 39Ω (2 ´ 18Ω + 3Ω), the differential load impedance is 103Ω (Z AAFL ), and the cutoff frequency is 2.4GHz. Since a higher series inductance value is required in the simulation, considering the inherent wiring inductance in the layout, I reduced these inductors to 3nH and proportionally increased the initial 1.8pF ground capacitance in the simulation to 2.2pF, which helps maintain proper roll-off around the required 2.4GHz. In this case, to achieve net performance, the TRF1208 is not reverse-terminated, and the net differential impedance load is 139Ω (Z AL ). An 18Ω series resistor isolates the filter capacitor from the amplifier’s output. A 15Ω resistor installed in series with the ADC input isolates the filter and the amplifier’s internal switching transients and provides the necessary characteristic load for the FDA. According to the datasheet, we used the 100Ω input impedance of the ADC. Table 2 summarizes the measured performance of the system, where the total insertion loss of the network is approximately 5.8dB. Table 2. Measured performance of the circuit Figure 5 shows the combined frequency response of the generated FDA, AAF, and ADC signal chain. Figure 5. Relationship between passband flatness performance and frequency Figure 6 shows the relationships between SNR and SFDR performance with frequency, respectively. Figure 6. Relationship between SNR/SFDR performance and frequency, sampling rate = 5.2GSPS AAF Design Conclusion Designing an AAF between an FDA and an RF ADC requires understanding all the different factors, parameters, and trade-offs involved, which is much more complex than it seems. In the design example described in this article, each parameter has equal weight; therefore, the selected values represent the interface performance of all design characteristics. In some designs, you can choose different values based on system requirements to optimize SFDR, SNR, or input drive levels. Keep all these necessary points in mind to avoid resonance in the next AAF. Stay tuned to our column, or explore more analog design possibilities by browsing the electronic version of Texas Instruments’ Analog Design Journal through ‘Read Original.’ Click ‘Read Original’ to browse the electronic version of the Analog Design Journal; more related knowledge awaits unlocking! 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