You need to login in order to view this content
Redirecting to the source: http://mp.weixin.qq.com/s?__biz=MzA3MzIwNDYwMA==&mid=2655340550&idx=1&sn=e906078372bb33833df66d8f5453e29c
Weixin Official Accounts Platform Applicable to 80V dual gate MOSFET for 48V battery disconnect switch and its application simulation detailed explanation Original Chen Qiugang Infineon Automotive Electronics Ecosystem Infineon Automotive Electronics Ecosystem Infineon Technologies (China) Co., Ltd Infineon has more than forty years of rich experience and technology accumulation in automotive semiconductors, committed to achieving cleaner, safer, and smarter vehicles with microelectronics. The Infineon Automotive Electronics Ecosystem shares with you the latest technology, products, solutions, collaborations, and trends of Infineon automotive electronics, building a platform for technical exchange and market cooperation with local partners. 133 original content August 23, 2024 07:01 Heilongjiang 1. Challenges faced by disconnect switches today The structure of modern vehicle electrical systems is becoming increasingly complex. This is due to the increase in the number of loads, the transition from lead-acid batteries to lithium-ion or other types of batteries, and the demand for functional safety measures such as fail-operational control. These factors lead to the increased use of battery and load disconnect switches, with MOSFETs becoming the preferred choice for high-load switches. To achieve the on-state resistance required for steady-state operation of the main switch, multiple MOSFETs are usually connected in parallel. In many cases, the main switch is bidirectional, capable of blocking current in both the charging and discharging directions of the battery. Figure 1 provides a simplified circuit diagram of a battery disconnect switch. This need to block current in both directions is due to protective measures taken during fault events, such as overvoltage or overcurrent caused by short circuits. This is especially important for off-board connections, such as harnesses connecting other control units to the disconnect switch. These harnesses have significant inductance, which must be considered after an overcurrent shutdown. The inductance of the harnesses stores considerable energy, which must be dissipated through the disconnect switch MOSFETs or other protective circuits such as flyback diodes. Figure 1 Typical bidirectional battery disconnect switch with flyback diode and precharge circuit 1.1 Capacitor charging and inrush current limitation In disconnect switch applications, it is often necessary to charge large capacitors near the load side. However, conventional MOSFETs are not suitable for limiting the inrush current into large capacitors, due to limitations on the Safe Operating Area (SOA) and transfer characteristics, such as transconductance. Because the drain current’s dependence on gate voltage, i.e., transconductance, is very steep, controlling the inrush current of MOSFETs can be very challenging. Furthermore, the temperature coefficient usually also affects the SOA. Therefore, limiting the current often becomes an impossible task. MOSFETs have two operating regions, demonstrated in transfer characteristics as thermally stable and thermally unstable regions, as shown in Figure 2. High positive temperature coefficients leading to thermal uneven distribution or thermal runaway will result in severe performance degradation when operating in the thermally unstable region. On the other hand, even when operating in the thermally stable region with uniform thermal distribution across the chip, large currents will generate high self-heating. Due to the high ZTC characteristics of MOSFETs optimized for RDS(on), reliable operation in linear mode is almost impossible, making them unsuitable for many applications. Figure 2 Standard OptiMOSTM 5 trench MOSFET Safe Operating Area and Transfer Characteristics Therefore, a typical charging concept limits the current through a separate precharge path using an expensive high-power resistor and a low-power MOSFET, as shown in Figure 1. Another solution is the use of DCDC converters with soft-start function for charging the DC-side capacitors, which can be more costly. Figure 3 shows an example charging waveform for a power resistor precharge circuit. In this example, a 1-ohm resistor is used to charge a 33mF capacitor. The curve shape asymptotically approaches the target capacitor voltage of 48V. The charging process slows steadily throughout, demonstrating the well-known behavior of the RC time constant. The dissipation on the resistor sharply decreases with current, making it unlikely to maximize the capacitor charging speed with independent control of resistor power and self-heating. Figure 3 Capacitor charging from 0 to 48V with precharge circuit (1 ohm, 33mF) 1.2 Short-circuit robustness (Avalanche breakdown and Active voltage clamping) A significant challenge for disconnect switches is ensuring circuit robustness during short circuits. When a short circuit or overcurrent fault is detected, the MOSFET will turn off to protect the system and the MOSFET from failure. However, the energy stored in the cable inductance still needs to be dissipated. Absent additional countermeasures, this energy would be dissipated through avalanche breakdown of the disconnect switch MOSFET. Figures 4 and 5 show a simplified circuit diagram and simulation waveform of an avalanche breakdown under 700A short-circuit turn-off current. To avoid damage and overheating caused by latch-up effects, MOSFETs with high avalanche current and energy ratings are required. If the MOSFET’s current or energy rating is exceeded, additional protection measures are necessary. Because of the impact of hot-carrier injection effects over the MOSFET’s lifecycle, a common challenge for avalanche breakdown is limiting the exposure time. During avalanche, the strong electric field generated internally by the device accelerates free carriers, affecting the ion regions. However, some hot carriers may inject into the gate oxide, resulting in parameter drift, limiting device lifespan, and consequently limiting avalanche breakdown exposure time and the number of occurrences. Figure 4 Simplified 48V disconnect switch short-circuit schematic with parasitic parameters considered Figure 5 Example simulation of avalanche breakdown after short-circuit shutdown The use of active clamping allows this energy to be dissipated differently. This requires the device to operate in the linear region rather than undergoing avalanche breakdown, achieved by limiting the drain-source voltage below the breakdown voltage but above the battery voltage. During clamping, a small gate voltage level must be maintained to keep the channel open, thereby conducting current and limiting the drain-source voltage. Figure 6 provides a simulation diagram of active clamping. However, allowing MOSFETs to operate in the thermally unstable region will cause severe issues. Additionally, having devices with steep transfer characteristics operate in parallel in linear mode is almost impossible. Due to process-induced gate threshold voltage variations, one MOSFET in parallel might end up carrying almost all the current. Figure 6 Example simulation of active clamping after short-circuit shutdown 2. Introduction of Dual Gate MOSFET The IAUTN08S5N012L dual gate MOSFET is designed with optimized capacitor charging and short-circuit concepts. This innovative approach removes the need for a separate precharge circuit, reducing costs. Moreover, this design enhances system short-circuit robustness, providing an ideal choice for reliable and efficient performance applications. Table 2, Figure 7 provide an overview of the product characteristics, packaging, and equivalent electrical symbols. Table 2 Figure 7 Dual gate MOSFET TOLL package and its equivalent circuit symbol 2.1 Two MOSFETs grow as a dual gate structure in the same package The dual gate MOSFET consists of two interleaved transistors grown on the same silicon chip, sharing a common drain and source but having independent gates through designated pins. One gate embodies the ONFET, achieving low on-resistance during steady-state operation; the other gate represents the LINFET, providing excellent SOA and linear operating performance. This makes it suitable for controlling inrush currents during capacitor charging and active clamping after short-circuit shutdown. The two MOSFsIn MOSFET, a single one bears almost all the current. Figure 6. Active clamp simulation example after short circuit shutdown. 2. Introduction of dual-gate MOSFET. IAUTN08S5N012L dual-gate MOSFET is designed with the concept of optimizing capacitor charging and short circuit. This innovative approach reduces costs by eliminating a separate pre-charge circuit. Moreover, this design enhances the system’s short circuit robustness, providing an ideal choice for reliable and efficient performance application needs. Table 2 and Figure 7 respectively provide an overview of product characteristics, package, and equivalent electrical symbols. Table 2 Figure 7. TOLL package and its equivalent circuit symbols for dual-gate MOSFET. 2.1 Two MOSFETs grown on the same package with dual-gate structure. The dual-gate MOSFET consists of two staggered transistors in parallel grown on the same silicon chip, sharing a common drain and source but with independent gates through designated pins. One gate represents the ONFET, achieving low on-resistance during steady-state operation; the other gate represents the LINFET, offering excellent SOA and linear operation performance. This makes it suitable for controlling inrush current during capacitor charging and active clamping after short circuit shutdown. The benefit of having two MOSFETs sharing one chip is that they can utilize each other’s cooling region or thermal capacity. Compared to a single standard MOSFET with unified technology, when both MOSFETs are turned on, the on-resistance is only slightly increased. 2.2 LINFET enhances SOA and transconductance. The LINFET is intentionally engineered to significantly enhance SOA performance, far surpassing that of standard trench process MOSFETs and comparable to planar process MOSFETs. By reducing ZTC and utilizing the chip area of ONFET, the LINFET demonstrates superior linear operation performance. Figure 8 graphically illustrates the improvement of LINFET SOA performance. For example, during high drain-source voltage and a pulse duration of 1ms, the SOA current has increased by 8 times compared to the ONFET. Figure 8. LINFET and ONFET performance comparison—ZTC and SOA. Low transconductance, which means a low rate of change of drain current concerning gate voltage, is another key advantage of LINFET. This brings two benefits: one is to achieve more accurate current control based on external gate voltage tolerance, and the other is to reduce the impact of gate voltage deviation on the current. Additionally, when multiple MOSFETs are controlled by one gate voltage, the LINFET can improve the current sharing effect in the linear mode. Figure 9 shows the comparison between ONFET and LINFET. For simplicity, only the impact of minimum and maximum gate threshold deviation on the drain current is considered (ignoring transconductance process deviation). Taking a typical current of 60A as an example, compare the maximum and minimum currents. It can be seen that the current range of ONFET is 5A to 90A, and the current range of LINFET is 40A to 80A. This clearly demonstrates the advantage of low transconductance: opening up new target applications such as short circuit clamping or capacitor charging. Low transconductance helps achieve precise control of inrush current and current sharing among multiple parallel MOSFETs in the linear operation mode. Figure 9. Performance comparison between ONFET and LINFET—transconductance and current tolerance. 3. How to use dual-gate MOSFET to solve the application challenges of disconnect switches. The LINFET within dual-gate MOSFET, due to enhanced SOA and low transconductance characteristics, makes it an excellent candidate for limiting inrush current in capacitor charging. 3.1 Fixed gate voltage to limit current. A simple way to use the LINFET to limit inrush current is to adjust the gate voltage. The target current limit depends on the device’s transfer and output characteristics. However, this method still leaves room for variation due to process deviations and other product characteristics. Therefore, it is particularly important to evaluate and find a good compromise between charging speed and self-heating considering these factors. To reduce this effect, the datasheet specifies the maximum and minimum current limiting accuracy under various conditions such as gate voltage between 5.6V and 6.2V and drain-source voltage between 6V and 48V. The recommended gate operating voltage of 5.6V is mainly because: firstly, 5.6V is very close to the ZTC point of the device, meaning the current is independent of temperature; secondly, a 5.6V voltage regulator can be used to limit the gate voltage, and its temperature coefficient is also small. Figure 10 shows a simplified disconnect switch circuit with a voltage regulator. The current variation due to the voltage tolerance of the voltage regulator can be determined based on the transconductance of the LINFET in the datasheet. For example, when the gate voltage is 5.6V, the transconductance dID/dVgs,LIN is about 50S. A deviation of +/-110mV in the voltage regulator results in an additional approximately +/-5.5A current deviation. Figure 10. Gate voltage control with voltage regulator to limit inrush current. 3.2 Pulse charging to control self-heating. Another key point to consider is self-heating. In most cases, the capacitor is very large, and simply limiting the gate voltage to turn on the LINFET is not sufficient to effectively control the device’s self-heating. Furthermore, since every car start requires capacitor charging, the decay of lifespan is also an important factor to explore. Self-heating depends on the following three factors: Zthja, ID, and VDS. To limit self-heating and the degradation of device lifespan, we recommend considering the following guidelines: operate above or near the ZTC point (Vgs,LIN > 5V) to avoid operating in the thermally unstable region; the temperature rise ΔTj caused by each pulse charging should be